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High-k and Metal Gate Research
The fundamental building blocks for all computer chips—transistors—have tracked with Moore's Law for forty years. Intel has led the industry in transistor gate dielectric scaling using silicon dioxide (SiO2) for seven logic-process generations over the last 15 years. But as transistors shrink, leakage current can increase. Managing that leakage is crucial for reliable high-speed operation, and is becoming an increasingly important factor in chip design. Intel has made a significant breakthrough in solving the chip power problem, identifying a new "high-k" (Hi-k) material called hafnium to replace the transistor's silicon dioxide gate dielectric, and new metals to replace the polysilicon gate electrode of NMOS and PMOS transistors. These new materials, along with the right process recipe, reduce gate leakage more than 100-fold, while delivering record transistor performance. To achieve this milestone for the 45nm node, Intel silicon research evaluated 100's of material combinations to find the right starting point for development.
 
High-k materials
To build next-generation transistors, Intel is working with new materials that show promise for replacing the silicon dioxide gate dielectric—where continued thinning makes it increasingly difficult to control current leakage. This thicker class of materials, known as "high-k," will replace today's silicon dioxide technology and then provide extendibility over several generations.

"High-k" stands for high dielectric constant, a measure of how much charge a material can hold. Different materials similarly have different abilities to hold charge. Imagine a sponge, which can hold a great deal of water; wood, which can hold less; and glass, which can hold none at all. Air is the reference point for this constant and has a "k" of one. "High-k" materials, such as hafnium dioxide (HfO2), zirconium dioxide (ZrO2) and titanium dioxide (TiO2) inherently have a dielectric constant or "k" above 3.9, the "k" of silicon dioxide.

The dielectric constant also relates directly to transistor performance. The higher "k" increases the transistor capacitance so that the transistor can switch properly between and "on" and "off" (WMV 9.5MB) states, with very low current when off yet very high current when on.
 
High-k benefits
After years of research, Intel identified the right high-k material and the right type of gate electrode materials to achieve record performance for both NMOS and PMOS technologies. By moving to a new high-k material, Intel was able to keep the drive current at the same level as with older materials—and overcome the leakage.

The entire semiconductor industry is struggling with the heat of chips, which increases exponentially as the number of transistors increase. Leakage control via new high-k materials is one of many steps toward making transistors run cooler. Because high-k gate dielectrics can be several times thicker, they reduce gate leakage by over 100 times. As a result, these devices run cooler. At the same time, Intel has engineered and demonstrated metal gate electrodes—which sit on top of the gate dielectric—that are compatible with high-k dielectrics.

Intel anticipates that this shift to a new material will be one of the most significant in the evolution of the metal-oxide silicon (MOS) transistor, which has had a silicon dioxide dielectric gate since its introduction in the 1960s. Intel's new high-k material will also require a new manufacturing process to lay down a thickness of one molecular level at a time. Now that the initial research is being implemented at the 45nm node research continues at Intel to identify the second generation of high-k to extend scaling further.
 
Learn more
History of high-k research at Intel
Application of high-k gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology (PDF 906KB)
Authors: Robert Chau, Justin Brask, Suman Datta, Gilbert Dewey, Mark Doczy, Brian Doyle, Jack Kavalieros, Ben Jin, Matthew Metz, Amlan Majumdar, and Marko Radosavljevic
Journal: Microelectronic Engineering, Volume 80, June 2005, pp. 1-6.
Role of High-k Gate Dielectrics and Metal Gate Electrodes in Emerging Nanoelectronic Devices (PDF 2.78MB)
Presenter: Robert Chau
Event: Plenary talk, 14th Biennial Conference on Insulating Films on Semiconductors 2005 (INFOS 2005), Leuven, Belgium
Date: June 22–24, 2005
High-k/Metal-Gate Stack and Its MOSFET Characteristics (PDF 142KB)
Authors: Robert Chau, Suman Datta, Mark Doczy, Brian Doyle, Jack Kavalieros, and Matthew Metz
Publication: IEEE Electron Device Letters, Vol. 25, No. 6, June 2004, pp. 408-410
Date: June 2004
Gate Dielectric Scaling for High-Performance CMOS: from SiO2/PolySi to High-k/Metal-Gate (PDF 397KB)
Author: Robert Chau
Event: International Workshop on Gate Insulator 2003, Tokyo, Japan
Date: November 6-7, 2003
Gate Dielectric Scaling for High-Performance CMOS: from SiO2 to High-k (PDF 303KB)
Authors: Robert Chau, S. Datta, M. Doczy, J. Kavalieros and M. Metz
Event: Extended Abstracts of International Workshop on Gate Insulator (IWGI), Tokyo, Japan
Publication: November 2003, pp. 124-126
Date: November 2003
 
 
 
Intel innovation makes Moore's Law a reality
For nearly four decades, Intel innovation has made Moore's Law a reality, touching billions of lives and changing the way the world lives, works and plays.
 

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